With the development of CMP technology in semiconductor processes, the metrology system docked to it (known as integrated metrology) has become widely used in past 20+years. By feeding back the wafer measurement results after polishing, not only can re-polishing be performed immediately, but also the time lost in transporting the wafer to a standalone metrology system is eliminated, enabling cycle time reduction, a key advantage of integrated metrology.
In addition, there are cases where added value can be found in performing measurements other than from the CMP process by simultaneously measuring the lower layer and/or 3D structure for process management before and after the CMP process. This presentation introduces the history of integrated metrology, and the recent needs and trends, such as dishing measurement before Cu-Cu bonding in 3d-NAND but also use cases in logic.