Hybrid bonding has long been used in the manufacturing of CMOS image sensor devices and 3D SoC products using this technology have also been released in recent years. Direct Cu-Cu bonding is poised to succeed microbumps in devices requiring high-bandwidth data transfer. While its adoption differs among various high-end applications, 3D stacked memory is expected to be the volume driver for hybrid bonding, with its initial adoption in 3D NAND stack followed by HBM and 3D DRAM. As known good dies/wafers are being bonded together, stringent process control is required every step along the way to ensure the final stacked product is of high yield. Bonding surface topography monitoring and the detection of particles, cracks and voids are some of the critical process control parameters in hybrid bonding. In this presentation, we will discuss the various metrology solutions addressing these needs.