Machine Learning Improves Final Test Forecast for Semiconductor Fabs

Semiconductor fabs are focusing on testing components that are already known to be good at back-end module testers due to the limited supply of chips. Traditionally, a semiconductor fab produces hundreds of wafers that are verified with functional product test programs, and tested wafers are sent to OSAT facilities for packaging and final package unit testing. Defective units that fail the final package testing stage are discarded, resulting in wasted time and expenses for dicing, packaging, and testing the final unit.

According to one estimate, based on the price of a 5nm wafer for a high-end smartphone, with packaging assembly and testing costs accounting for about 30% of the total chip cost. By sending wafers that are known or predicted to pass packaging final tests onwards to the OSAT facility, the number of rejects at the packaging final test step can be reduced, resulting in higher finish goods output. Using historical data from product testing at the fab level and package final test data, machine learning can be used to produce a yield/final test forecast, thus ensuring only good parts are sent to the back-end packaging facility for dicing/packaging and ultimately into a multi-chip module.

Machine learning models are extensively used in science, business, and engineering. In this situation, a deep neural networks (DNN) model can be used to represent the outcome and prediction of the final test package yield. Early detection/prediction of only good products moving downstream to the OSAT facility becomes critical. By maximizing and ensuring testers are only testing good parts on higher yielding parts, capital utilization/ROI can be increased, thus ensuring cost-effectiveness in ensuring a continuous supply of finished goods to end customers.