Abstract
Surface Relief Grating (SRG) waveguides have been adopted as the mainstream solution in the industry, for its slim profile, high transparency, and large field of view. Furthermore, with their superior optical performance and mass production potential, SRG waveguides have emerged as a critical pathway for high‑performance augmented reality (AR) and mixed reality (MR) displays. In the mass production of SRG optical waveguides, where multi‑layer and double‑sided fabrication demand strict process control of overlay, geometry, and defects. We present a full process control solution for SRG mass production, combining optical critical dimension (OCD) metrology for the critical parameters of SRGs such as the grating depth, slanted angle, and periods, picosecond ultrasonic (PULSE™) technology for the metal film thickness measurement, image‑based overlay (IBO) on the IVS™ platform for precise overlay control, automated optical inspection based Dragonfly® system for the defects integrated throughout the entire SRG manufacturing process. OCD shows sub‑nanometer deviation and excellent matching with AFM, with high dynamic stability. PULSE™ technology ensures rapid, non‑contact measurement and uniformity control of chromium (Cr) and aluminum (Al) hard masks. Overlay precision reaches 0.26 nm (X) and 0.18 nm (Y) at 3σ, well within sub‑100 nm alignment requirements. Automated inspection captures >95% of submicron defects with low false positives. This framework has been validated in mass production at leading AR/MR manufacturers, enabling fully digitalized closed‑loop process control and supporting large‑scale, high‑yield SRG waveguide manufacturing.
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Abstract
A vital component of modern communication systems, bulk acoustic wave resonators (BAW) function as filters, oscillators, and sensors. In a BAW device, the acoustic waves are confined within a specific region to achieve efficient resonance. The air ring structure, including the edge air layer structure, prevents acoustic energy from leaking. However, measuring the critical dimensions (CD) of edge air layers is challenging. In this paper, we will show how Onto Innovation’s IVS™ 220 optical overlay and CD metrology system can measure the edge air layer structure using a CD step application. The IVS 220 system provides good repeatability and high throughput [130 wph, five (5) fields, one (1) site per field]. In addition, the IVS 220 system also can be used for overlay measurement, CD measurement (including angle CD and diameter of the circle or hole), and Z height measurement.
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Abstract
The bipolar-CMOS-DMOS (BCD) process is an advanced semiconductor technology integrating bipolar, CMOS, and DMOS devices onto a single chip, providing a compact, high-performance platform for the integration of analog, digital, and power circuitry. Thin-film resistors are employed to ensure precise resistance values and minimal temperature coefficients (TCR), thereby delivering enhanced accuracy and reliability for analog circuit applications. The SiCr thin-film resistor exhibits low TCR, consistent resistance values, minimal parasitic capacitance, and low leakage current. These characteristics surpass those of diffusion resistors, making SiCr thin-film resistor a good candidate for the precision resistance networks required in high-accuracy integrated and module circuits for BCD process. Picosecond ultrasonics (PULSE™ technology) has become a prevalent method in metal film measurement due to its rapid, contactless, and non-destructive capabilities. In this work, we demonstrate that picosecond ultrasonics has outstanding repeatability [1sigma<0.5Å] in SiCr thickness measurement as well as its excellent sensitivity to small thickness variations. SiCr thickness and uniformity could be well monitored and controlled. Furthermore, PULSE technology can reflect the surface quality of the film by measuring the probe beam (522nm) reflectivity. Then, specialty gases flow rate would be closely monitored and controlled to achieve target SiCr thin films with desirable TCR properties.
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Abstract
Fan-out panel-level packaging (FOPLP) offers significant advantages in meeting the aggressive demands of AI chips, particularly by supporting larger package sizes and optimizing substrate utilization. However, as the AI market continues to expand rapidly, the challenge lies in how to swiftly transition to mass production. A second challenge is yield; AI chips integrate multiple control units and high-bandwidth memory (HBM) during the packaging process. These components are expensive. Therefore, maximizing yield at every step and identifying defects early to minimize losses is critical. Yield prediction technology addresses both the speed and yield challenges of FOPLP lithography. This approach utilizes an offline metrology tool to measure die shifts or pattern distortions on the panel substrate. The metrology data is then analyzed using machine learning algorithms, which, when combined with customized process parameters, can accurately predict overlay errors and overlay yield. This predictive insight allows for more informed decision-making and earlier intervention in the lithography process. In this study, we will detail how yield prediction technology functions and how its application in the early R&D stages can accelerate development. We will also discuss how yield prediction technology can be implemented in mass production lines for pre-emptive quality control. With the expected significant growth of FOPLP over the coming years, we believe that yield prediction technology will provide a clear path toward achieving both rapid production and high yields in FOPLP lithography.
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Abstract
Picosecond laser acoustic (PULSE™) Technology is an industry benchmark for metal film metrology[1]. The non-contact, non-destructive technique is well-suited for providing simultaneous multi-layer measurements in-line on product wafers. The technology has found widespread adoption across multiple device segments supporting both leading edge and specialty process monitoring and control. Thin film thickness control in advanced packaging is vital for ensuring the electrical, thermal, mechanical, and process-related performance of semiconductor devices. Inaccurate film thickness can lead to performance degradation, higher defect rates, and increased production costs, which makes precision metrology essential in the modern semiconductor manufacturing process. This paper highlights the advantages of the application of PULSE Technology in advanced packaging process monitoring.
By presenting specific examples, we showcase PULSE Technology’s capability to measure multiple-layer stacks, with excellent repeatability, easy to match between tools, and long-term stability. The small spot size makes it possible for direct measurement on BUMPs for advanced packing. Recent upgrades to the system include extending the measurement range to cover very thick, rough films and improvements to signal to noise ratios making it more suitable for advanced packaging to use a single metrology tool to cover a wide range of applications. Additionally, we present examples of the non-destructive Young’s modulus measurement capability that provides critical information about the mechanical strength of the packaging material and residue detection.
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Abstract
As scaling in semiconductor devices continues, the aspect ratios of deep trench isolation (DTI) structures have increased. DTI structures are used in power devices, power management ICs and image sensors as a method to isolate active devices by reducing crosstalk, parasitic capacitance, latch-up and allowing for an increase breakdown voltage of active devices. Measurement of these structures in high volume manufacturing (HVM), with non-destructive technology, has mostly been limited to the depth and top width of the DTI structure, while the bottom width (BCD) has not been able to be reliably measured. Here we present two different optical metrologies, “conventional” OCD and IRCD, that operate in the UV-VIS-NIR and MIR region of the electromagnetic spectrum, respectively, and discuss the measurability of DTI sidewall profile, bottom width, and depth in BCD (Bipolar CMOS DMOS) power management IC devices for each method at various pitches and line to space ratios. Experimental data will be presented showing sensitivity and discrimination of IRCD to a DOE specifically on the bottom width for three different structures.