The semiconductor industry is a land of peaks and valleys. It’s a place where each innovation represents the culmination of a long and often difficult climb to the summit. In the case of glass substrates, the peak of the mountain is in sight.

The arrival of glass substrates comes at an opportune time, as the industry eyes new process innovations to meet the incredible demand for high performance applications, like AI, and their stringent requirements, including further decreases in size and pitch for through glass vias (TGV). Up until now, organic substrates employed plated through hole (PTH) type vias , but these will be unable to meet these challenging requirements.

With the advent of glass core substrates replacing organic substrates, various processes hitherto requiring basic printed circuit board (PCB) technology take on a new dimension with significantly greater complexity. This blog discusses the formation of interconnects through the substrate, whether those interconnects are PTH for organic substrates or TGV in glass substrates.

The concept of zero defect manufacturing has been around for decades, arising first in the aerospace and defense industry. Since then, this manufacturing approach has been adopted by the automotive industry, and it has only grown in importance as the sector transitions to electric vehicles. Given the role semiconductors play in today’s vehicles, and will play in the future, it is no surprise the industry has adopted a zero defect approach.

However, the quest for zero defect manufacturing goes well beyond the aerospace, defense, and automotive industries. Many companies that have started or are planning digital transformations are pursuing zero defect manufacturing. Accomplishing this requires using data from a wide range of sources, including materials, products, processes, factory subsystems, and equipment. When all of this data is properly integrated, and fabs are able to take complete advantage of the analytics from their monitoring systems, the goal of a zero defect manufacturing environment is achievable.

Before we go any further, we should get one thing out of the way: zero defect manufacturing does not promise zero defects. It is a commitment to properly identifying defects and sources, giving manufacturers the opportunity to detect dormant failures early on and make proactive corrections.

Semiconductor manufacturing creates a wealth of data – from materials, products, factory subsystems and equipment. But how do we best utilize that information to optimize processes and reach the goal of zero defect manufacturing?

This is a topic we first explored in our previous blog, “Achieving Zero Defect Manufacturing Part 1: Detect & Classify.” In it, we examined real-time defect classification at the defect, die and wafer level. In this blog, the second in our three-part series, we will discuss how to use root cause analysis to determine the source of defects. For starters, we will address the software tools needed to properly conduct root cause analysis for a faster understanding of visual, non-visual and latent defect sources.

Whether the discussion is about smart manufacturing or digital transformation, one of the biggest conversations in the semiconductor industry today centers on the tremendous amount of data fabs collect and how they utilize that data.

While chip makers are accumulating petabytes of data across the entire semiconductor process, a question arises: how much of that information is being fully utilized? The answer may be around 20%, according to the Semiconductor Engineering article “Too Much Fab and Test Data, Low Utilization.” Unfortunately, this poses a challenge because fab end customers are demanding highly reliable chips, in other words, chips with zero escaping defects and which offer manufacturers clear genealogy and traceability.

Many of you reading this work for companies that have started or are planning digital transformations. To do this, these companies will need to better integrate the data they collect — and that includes data from materials, products, processes, factory subsystems and equipment.

For smart manufacturing to truly live up to its potential, manufacturers will need inline automation that takes complete advantage of the analytics their monitoring systems generate, analytics which can be fed back to the process tools, manufacturing execution systems and other factory systems in real time. Working in concert, these integrated systems are essential to creating a zero defect manufacturing environment.

In the world of smart manufacturing, manufacturers will be tasked with providing timely total solutions to detect and classify defects using inspection and metrology tools, conduct root cause analysis to determine the source of said defects and, finally, employ process control and equipment monitoring using run-to-run and fault detection and classification software solutions to prevent defects from reoccurring.

In this blog, the first in our three-part series “Achieving Zero Defect Manufacturing,” we will focus on detecting and classifying defects. We will start by looking at solutions at the defect level before moving on to the die level and the wafer level.

When it comes to data accessibility, the terms “secure” and “share” seem like two diametrically opposed words. Conventional wisdom would suggest that any effort to secure data would involve limiting access to that data, while sharing data would involve opening up access to that data for others to view and use.

As it turns out, semiconductor operations need to do both.

On the one hand, semiconductor companies often need to share data so others can leverage data for problem solving and improve their overall manufacturing processes. On the other, these companies need to know their data is secure and free from data leaks resulting in lost IP or negating a competitive advantage. The solution: secured data sharing.

Automated optical inspection (AOI) is a cornerstone in semiconductor manufacturing, assembly and testing facilities, and as such, it plays a crucial role in yield management and process control. Traditionally, AOI generates millions of defect images, all of which are manually reviewed by operators. This process is not only time-consuming but error prone due to human involvement and fatigue, which can negatively impact the quality and reliability of the review.

In the Industry 4.0 era, the integration of a deep learning-based automatic defect classification (ADC) software solution marks a significant advancement in manufacturing automation. For one, ADC solutions reduce manual workload – meaning less chance of human error and higher accuracy – and, two, they are poised to lower the costs associated with high-volume manufacturing (HVM).

Deep learning, a branch of machine learning based on artificial neural networks, is at the core of these ADC solutions. It mimics the human brain’s ability to learn and make decisions; this enables the system to recognize complex patterns in data without explicit programming. Compared to traditional methods, this approach offers a significant leap in processing efficiency and accuracy.