Trends in advanced device fabrication require combined lithography-etching multi-patterning sequences and self-aligned multi-patterning to form devices’ finest features at subwavelength dimensions.
As EUV lithography (13.5 nm) progresses to larger numerical apertures and new thin resists, new multipatterning sequences must be developed with mutually compatible resists and proximal layers to avoid resist poisoning, encourage adhesion, and enable expended materials to be easily removed without harming similar materials. Subsequent pattern transfers to form device structures by etching require mutually etch-exclusive resists, masking, and spacer materials, where each can be selectively removed by an etch process that leaves the other materials unaffected.
Materials’ resistances or susceptibilities to different etch chemistries are ultimately determined by their etching performances. Material etching rates are defined by the differences in thickness measurements made prior to and after exposure to specific wet or dry etchants for specific time intervals. Selectivity is a relative comparison of the ratio of different materials’ etching rates in an etchant where, for example, a patterning hardmask must have low selectivity compared to the underlying material that it protects.
Optically opaque materials present a series of challenges for alignment and overlay in the semi-damascene process flow or after the processing of the magnetic tunnel junction (MTJ) of a Magnetic Random-Access Memory (MRAM). The overlay and alignment of a lithographically defined pattern on top of the pattern and the underlying layer is fundamental to device operation in all multi-layer patterned process flows. There are a wide variety of optical techniques and specially designed targets (Figure 2) that are used to address this problem in conventional flows. Typically, either an ultraviolet, visible, or infrared light is coupled through the top photoresist layer or an etched hard mask to be aligned to the bottom layer [1]. However, in some MRAM flows this coupling may not be possible as there may be an intervening opaque layer (Figure 1). In such cases, conventional methods of alignment using light fail. To overcome this issue, extra patterning operations may be used to open areas around the alignment features, but these operations add significant process cost.
In this paper we evaluate the use of picosecond laser acoustics (PLA) measurement as an alternative method to characterize the overlay and alignment patterns that are embedded under opaque metal films. We selected the MRAM process flow for this study where the different overlay and alignment markers were underneath opaque layers including an MTJ layer. These specific markers are imaged with the help of PLA employing an ultrafast laser in a pump and probe configuration to generate and detect acoustic waves capable of propagating through optically opaque layers. This technique, in sharp contrast with other competing acoustic imaging techniques such as scanning acoustic microscopy (SAM) [5,6], does not require the sample to be submerged in a coupling medium such as water.
A new metrology system uses spectroscopic ellipsometry at mid-infrared wavelengths to provide accurate critical dimension and profile measurements of high-aspect-ratio (HAR) holes in 3D NAND memory. This information is essential for developing and controlling the fabrication process. The non-destructive technique exploits unique optical properties of mid-IR radiation to extract information that has not previously been available on a robust platform suitable for in-fab use. We look at two examples: channel holes, which have aspect ratios as high as 60:1 and eventually become vertical strings of memory cells in 3d NAND memory, and the holes in the hardmask, which have aspect ratios up to 25:1 and are used to etch the channel holes.
Ellipsometric optical critical dimension (OCD) metrology in the ultraviolet to near infrared (190 nm to 1.7 mm) spectral range is a well-established process control technique. It can measure buried features inaccessible to top-down non-destructive optical, electron, or ion imaging techniques, but it has limitations when applied to the extreme 3D and high aspect ratio features of 3D NAND devices. As more devices become inherently three-dimensional and scale vertically, the ability to measure the exact dimensions of buried features and re-entrant geometries will become increasingly important.
The transistor channel strings in the most advanced 3D NAND devices begin as high-aspect ratio holes (hereafter channel holes) etched through a stack of alternating silicon dioxide and silicon nitride (or polysilicon) layers with 128 or more layer-pairs. Etching holes with 100 nm diameters and depths greater than 6 mm (aspect ratios greater than 60:1) is challenging. The etch process uses a hard mask with holes of similar diameter and depths up 2.5 microns, giving them aspect ratios of 25:1 and presenting challenges similar to the channel hole etch. Figure 1 illustrates these structures schematically. An ideal etch process would yield a perfectly cylindrical hole with a uniform circular profile along its full length across the entire surface of a 300mm wafer. Realizable etch processes show significant deviations from cylindrical profiles both within a wafer and from wafer to wafer. Developing and controlling these processes requires the ability to measure hole profiles. Having this measurement capability inline accelerates process learning during the device development stage and is also critical even after the process has been transferred to high volume manufacturing where it proliferates to more etch chambers.
Picosecond Ultrasonics (PULSE Technology) has been widely adopted as the tool-of-record for metal film thickness metrology in semiconductor fabs around the world. It provides unique advantages, such as being a rapid, non-contact, non-destructive technology, and has capabilities for simultaneous multiple layer measurement. In this paper, we describe the unique advantages of Picosecond Ultrasonics for advanced radio frequency (RF) applications. RF filter process control requires stringent metrology due to tight process tolerances. The first principles-based PULSE technology does not require external calibration standards and provides robust measurement capability for multi-layer thickness measurements. For advanced RF applications, the capability of PULSE technology to measure both velocity and thickness simultaneously for transparent and semi-transparent films offers a lot of potential for not only monitoring processes but offers insight into the device performance. The PULSE technique can also simultaneously measure full stack for multilayer metal stack measurements with excellent repeatability and long-term stability which makes process control more efficient and reliable. Fast throughput makes it possible for a high sampling rate for RF applications which is the key for device level process control and yield improvement.
The global RF semiconductor market size is growing rapidly at a CAGR of 8.5% in the next five years from 17.4 billion in 2020 to 26.2 billion USD in 2025. The rollout of 5G technology and its enabled Internet of Things (IoT) are the main driving force for this growth. Each 5G device requires up to 100 filters to make sure each band is isolated to avoid interference that will drain battery life, reduce data speeds, and cause dropped calls. RF filters are becoming more and more critical for all signal process applications. 5G devices require Bulk Acoustic Wave (BAW) filters which can work better at higher frequencies. With more and more filters to fit into a device, the size of filters is also shrinking dramatically in three dimensions. These advances in filter technology place stringent demands on manufacturing which in turn requires accurate and precise metrology techniques. Both thickness and acoustic properties of the piezoelectric layer determine the frequency response of filters. Thickness accuracy and uniformity requirements for the films are beyond what process tools can offer at deposition and there are several options available to achieve such tight controls post-deposition. Metrology techniques employed for characterizing these properties must meet the sensitivity, accuracy, and stringent repeatability requirements. The thickness of the full stack and especially the thickness and sound velocity of the piezoelectric layer are key to realizing the extremely tight process control of frequency accuracy (3σ) of 0.1% or better. A high sampling rate on a hundred-micron level device is needed to make sure all devices across the wafer can meet the requirements which require fast throughput with a small measurement probe.
The multiple demands of 3D NAND to enable yield and performance increase in difficulty at each generation. First generation devices, at 24-32 layer pairs, pushed process tools to extremes, going quickly from 10:1 to 40:1 aspect ratios for today’s 64-96 pair single tier devices. The aspect ratios increased as fast as the manufacturing challenges. To continue bit density scaling, processing improved to enable multi bit storage per layer, but still even more layer pairs are needed. With increasing layer pairs, plasma etch becomes exponentially slower.
This was quickly addressed by tier stacking—splitting the massive stack into two tiers—and it will likely increase to three or more tiers in the future. The advantage of a two-tier process is that it reduces the single etch step to a more manageable process, i.e., two 64 pair etches instead of one 128, or two 96 pair instead of one 192. 256 pair, two or three tier devices, are in development now, and 384 or more expected soon. The channel hole control improved in terms of individual profile, but at the cost of increasing device integration challenges, like adding a joint into the middle of the stack. These integration challenges are confounded by combining variation from multiple process steps. There is an increasing need to identify, measure, separate, and control each of these sources of variability.
Gate-all-around (GAA) transistors offer significant performance advantages at advanced nodes, but only at the cost of significant increases in process complexity. Complicated three-dimensional structures and shrinking critical dimensions make precise, accurate metrology in GAA manufacturing processes both more important and more challenging. Scatterometry-based optical critical dimension (OCD) metrology has become mainstream in the last several generations of semiconductor development, in part because of its ability to measure three dimensional shapes and subsurface/re-entrant features. The latest generation of OCD systems combines improvements in signal-to-noise ratios, signal fidelity and advanced machine learning capabilities that allow it to support the most challenging GAA process steps with repeatable measurements and production worthy throughput.