Abstract
Picosecond laser acoustic (PULSE™) Technology is an industry benchmark for metal film metrology[1]. The non-contact, non-destructive technique is well-suited for providing simultaneous multi-layer measurements in-line on product wafers. The technology has found widespread adoption across multiple device segments supporting both leading edge and specialty process monitoring and control. Thin film thickness control in advanced packaging is vital for ensuring the electrical, thermal, mechanical, and process-related performance of semiconductor devices. Inaccurate film thickness can lead to performance degradation, higher defect rates, and increased production costs, which makes precision metrology essential in the modern semiconductor manufacturing process. This paper highlights the advantages of the application of PULSE Technology in advanced packaging process monitoring.
By presenting specific examples, we showcase PULSE Technology’s capability to measure multiple-layer stacks, with excellent repeatability, easy to match between tools, and long-term stability. The small spot size makes it possible for direct measurement on BUMPs for advanced packing. Recent upgrades to the system include extending the measurement range to cover very thick, rough films and improvements to signal to noise ratios making it more suitable for advanced packaging to use a single metrology tool to cover a wide range of applications. Additionally, we present examples of the non-destructive Young’s modulus measurement capability that provides critical information about the mechanical strength of the packaging material and residue detection.
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Artificial intelligence is one of the driving forces in today’s semiconductor industry, with more traditional market drivers like high performance compute and smart phones continuing to play important roles. This situation is unlikely change in the years ahead as chip makers continue their quest to create the most advanced nodes. With 3nm nodes in production and 2nm nodes on the horizon, the importance of film measurement only grows in significance as fabs seek to maintain the performance and reliability of cutting-edge devices.
Film metrology is an essential part of semiconductor manufacturing, whether you are dealing with material discovery, technology development, equipment or process control. In a typical semiconductor device manufacturing cycle, there are hundreds of film deposition and removal steps. In addition, film deposition and removal are also commonly used to monitor equipment health. Many of these steps use film measurement tools to ensure that equipment and processes are meeting production requirement.
Optical critical dimension metrology (OCD), also known as optical scatterometry, has been an integral part of the semiconductor “critical dimension” process control ecosystem for over two decades. OCD has inherent advantages over competing measurement techniques (such as CD-SEM, AFM, and cross-sectional SEM) because it is noncontact, non-destructive, fast (sub-second acquisition time), and extremely precise. OCD is an indirect, model-based optical technique (typically spectroscopic) that allows for the extraction of critical geometric parameters, asymmetries, and optical properties of periodically patterned structures at sensitivities much less than the measurement wavelength of light (>100x smaller).
Such sensitivity to multiple geometric parameters and material properties is due to the use of polarization-sensitive measurement techniques, like spectroscopic ellipsometry, and a sophisticated electromagnetic (EM) solver to simulate the spectral response of a periodic structure. If you already have a spectroscopic ellipsometer, you have the best way to measure thin film thicknesses and optical properties and a potential OCD tool to characterize 3D nanostructures. The missing piece is the analytical modeling software, which is where Ai Diffract, from Onto Innovation, comes in.
In this episode, Françoise von Trapp talks with Onto Innovation’s Monita Pau and Jiangtao Hu about metrology for advanced packaging – why do we need it? What are the challenges, and how do we solve them?
In semiconductor manufacturing front-end processes, metrology has always been a critical step to ensure consistency of very fine features. It’s only recently become important to back-end advanced packaging processes – especially for heterogeneous integration. As chips are designed with smaller features, advanced packaging processes are becoming more front-end like.
You’ll learn about how metrology designed for front-end manufacturing is being reimagined for wafer-level and assembly applications such as:
- Hybrid bonding
- 3D stacking with micro bumps
- RDL applications for interposers
- TSV applications
The speakers discuss the challenges, gaps, and solutions for each. You’ll also learn what makes Onto Innovation uniquely qualified to support this.
The United States is seeking to breathe new life into its domestic semiconductor packaging sector with the National Advanced Packaging Manufacturing Program (NAPMP), an initiative to “establish and accelerate domestic capacity for advanced packaging substrates and substrate materials,” according to a Commerce Department announcement from earlier this year [1]. In part, this program is the result of two very distinct trends, both of which are high-priority pursuits for governments and manufacturers. On the one hand, many nations like the U.S. are looking to shore up their semiconductor manufacturing capabilities to better protect themselves from potential geopolitical complications. Still another consideration is today’s rapidly growing demand for high-end applications like artificial intelligence (AI) and high performance computing (HPC) that are driving the need for advanced packages with 2.5 and 3D architectures. Such structures are built upon advanced integrated circuit substrates (AICS). Furthermore, the coming era of glass core substrates in advanced packaging will offer another level of challenges. The future is coming, and few want to be left behind.
The road to the future is not always a smooth, trouble-free drive. Along the way, there may be unforeseen detours, potholes and accidents, each one capable of setting progress back. But for those behind the wheel, those obstacles are just a part of the journey.
Such is the case for the automotive industry as it continues to steer away from gas-powered vehicles and turn toward hybrid and electric vehicles. To accomplish this, manufacturers of power devices are opting to use wide-bandwidth compound semiconductors like SiC and GaN. The reason: compound semiconductors accommodate higher voltages, faster switching speeds and lower losses than traditional silicon-based power devices.
For the purpose of our three-part series, we have been focusing on SiC power devices, the challenges presented by trench-based architectures that reduce on-resistance and increase carrier mobility, and the need to accurately measure epi layer growth and the depth of implant layers. Before we move onto the details of this blog, let’s take a quick look back at the previous two blogs.