Whether the discussion is about smart manufacturing or digital transformation, one of the biggest conversations in the semiconductor industry today centers on the tremendous amount of data fabs collect and how they utilize that data.

While chip makers are accumulating petabytes of data across the entire semiconductor process, a question arises: how much of that information is being fully utilized? The answer may be around 20%, according to the Semiconductor Engineering article “Too Much Fab and Test Data, Low Utilization.” Unfortunately, this poses a challenge because fab end customers are demanding highly reliable chips, in other words, chips with zero escaping defects and which offer manufacturers clear genealogy and traceability.

Many of you reading this work for companies that have started or are planning digital transformations. To do this, these companies will need to better integrate the data they collect — and that includes data from materials, products, processes, factory subsystems and equipment.

For smart manufacturing to truly live up to its potential, manufacturers will need inline automation that takes complete advantage of the analytics their monitoring systems generate, analytics which can be fed back to the process tools, manufacturing execution systems and other factory systems in real time. Working in concert, these integrated systems are essential to creating a zero defect manufacturing environment.

In the world of smart manufacturing, manufacturers will be tasked with providing timely total solutions to detect and classify defects using inspection and metrology tools, conduct root cause analysis to determine the source of said defects and, finally, employ process control and equipment monitoring using run-to-run and fault detection and classification software solutions to prevent defects from reoccurring.

In this blog, the first in our three-part series “Achieving Zero Defect Manufacturing,” we will focus on detecting and classifying defects. We will start by looking at solutions at the defect level before moving on to the die level and the wafer level.

The United States is seeking to breathe new life into its domestic semiconductor packaging sector with the National Advanced Packaging Manufacturing Program (NAPMP), an initiative to “establish and accelerate domestic capacity for advanced packaging substrates and substrate materials,” according to a Commerce Department announcement from earlier this year [1]. In part, this program is the result of two very distinct trends, both of which are high-priority pursuits for governments and manufacturers. On the one hand, many nations like the U.S. are looking to shore up their semiconductor manufacturing capabilities to better protect themselves from potential geopolitical complications. Still another consideration is today’s rapidly growing demand for high-end applications like artificial intelligence (AI) and high performance computing (HPC) that are driving the need for advanced packages with 2.5 and 3D architectures. Such structures are built upon advanced integrated circuit substrates (AICS). Furthermore, the coming era of glass core substrates in advanced packaging will offer another level of challenges. The future is coming, and few want to be left behind.

Automated optical inspection (AOI) is a cornerstone in semiconductor manufacturing, assembly and testing facilities, and as such, it plays a crucial role in yield management and process control. Traditionally, AOI generates millions of defect images, all of which are manually reviewed by operators. This process is not only time-consuming but error prone due to human involvement and fatigue, which can negatively impact the quality and reliability of the review.

In the Industry 4.0 era, the integration of a deep learning-based automatic defect classification (ADC) software solution marks a significant advancement in manufacturing automation. For one, ADC solutions reduce manual workload – meaning less chance of human error and higher accuracy – and, two, they are poised to lower the costs associated with high-volume manufacturing (HVM).

Deep learning, a branch of machine learning based on artificial neural networks, is at the core of these ADC solutions. It mimics the human brain’s ability to learn and make decisions; this enables the system to recognize complex patterns in data without explicit programming. Compared to traditional methods, this approach offers a significant leap in processing efficiency and accuracy.

Onto Innovation’s Monita Pau and Prasad Bachiraju contribute to the March 2024 edition of Semiconductor Digest.

The 4Di InSpec automated metrology system (AMS) is a high-throughput, high resolution defect and feature inspection solution. The automated system can measure dozens of edge break features, chamfers, and radii in minutes rather than days, vastly improving throughput and driving down inspection costs. The 4Di InSpec AMS integrates a non-contact 4D InSpec or 4D InSpec XL surface gage with a collaborative robot and other automation for rapid production inspection. 4Di InSpec AMS systems are the turnkey option for quality control of aerospace components such as turbine blades and rotors, air foils, high pressure compressor blades, blisks, and dovetails. The high resolution gage measures in any orientation, on curved surfaces, over large and complex geometries, and in tight spaces or blind locations. The 4Di InSpec AMS instantly produces high resolution, 3D measurement results, with far more information than other methods. An inspector can immediately see both an image of the feature and easy-to-read statistics. User-friendly measurement automation software flags any out-of-spec measurements and automatically remeasures the locations.

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Abstract

In traditional semiconductor packaging, manual defect review after automated optical inspection (AOI) is an arduous task for operators and engineers, involving review of both good and bad die. It is hard to avoid human errors when reviewing millions of defect images every day, and as a result, underkill or overkill of die can occur. Automatic defect classification (ADC) can reduce the number of defect images that need to be reviewed by operators. The ADC process can also be integrated with AOI engines to reduce nuisance defect images to reduce AOI image capturing time. This paper will focus on how to utilize Onto Innovation’s TrueADC software product to build ADC classifiers using a multi-engine (ME) solution. The software supports CNN, DNN and KNN algorithms. The use of CNN and DNN are currently mainstream in the development of deep learning (DL) for ADC classification in the semiconductor industry. We will address how to improve classification by using multiple models in the classification process with unique algorithms. As a result, the user can achieve industry requirements with very demanding specifications, like high accuracy, high purity, and high classification rate with very low escape rates.

 

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