IMPULSE®+ System
The IMPULSE+ system is designed to deliver film measurement, fidelity and productivity in the CMP process module. Available as an integrated or standalone platform, it offers high sensitivity and accuracy.

Product Overview
An integrated metrology standard, the IMPULSE+ system offers high sensitivity and accuracy to CMP process excursions and enables device makers to establish APC control with high-accuracy feedback. The IMPULSE+ system works in conjunction with the Atlas® platform, facilitating cross-module process optimization and comprehensive fab-wide process control.
Based on a common optical design derived from our stand-alone Atlas® platform, the IMPULSE+ system shares superior deep ultraviolet (DUV) optics. This unique ecosystem can be leveraged to improve signal to noise ratio by applying spectra feedforward from the Atlas platform, further enhanced by AI-driven machine analytics. This combination affords CMP process engineers a potent arsenal of capability to manage excursions and drive process improvement (Cpk.).
The IMPULSE+ system is widely adopted across key steps in DRAM, 3D-NAND, CMOS image sensor and foundry/logic device manufacturing. challenging to measure.
Applications
- CMP
Intelligent Line Monitoring & Control with Integrated Metrology
Enhance CMP process control with a connected metrology approach that feeds forward data from standalone OCD or films metrology to integrated metrology, connected through AI-driven analytical software. This approach, powered by advanced modeling and analysis tools, can deliver high-precision, high-throughput results—minimizing or eliminating the need for and cost of new TEM data and enabling accelerated time to solution, faster excursion detection, reduced cost and improved Cpk.

Enhancing CMP Process Control with Intelligent Line Monitoring & Integrated Metrology
As semiconductor manufacturers push the boundaries of performance and functionality—driven by high-performance computing and AI applications—chemical mechanical planarization (CMP) processes increase in intensity complexity. New logic transistor designs, 3D NAND stacking, and DRAM integration introduce more CMP layers and tighter process windows.

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