High-Throughput Photoluminescence Inspection for Killer Defect Detection/Classification in Next-Generation Power Semiconductor Substrates

By Jason Lin

Abstract

As the power compound semiconductor industry rapidly transitions from 150 mm to 200 mm silicon carbide (SiC) substrates and begins exploring 300 mm gallium nitride (GaN) platforms, the demand for advanced defect detection and classification technologies has become more urgent than ever. The shift to larger wafer formats introduces significant challenges in maintaining device yield, reliability, and cost-effectiveness. Crystalline and surface defects—including particles, pits, bumps, scratches, and contamination—along with subsurface anomalies such as stacking faults, basal plane dislocations (BPDs), and threading screw dislocations (TSDs), are known to critically degrade the electrical performance and long-term reliability of power devices. Among these, subsurface crystalline defects are particularly detrimental, often leading to catastrophic yield losses at the substrate level. 

Unlike the mature silicon-based semiconductor ecosystem, the power device industry lacks robust, high-throughput inspection tools capable of identifying and classifying these defects in real time. Current methods often require extensive post-processing and manual review, which are time-consuming and insufficient for high-volume manufacturing. This gap presents a significant bottleneck in scaling up production and achieving consistent quality across larger wafers. 

To address this pressing need, we present a novel photoluminescence-based inspection system designed to detect and classify a wide spectrum of defect types with high sensitivity and speed. By leveraging a multi-wavelength light source and precision-engineered optics, including a high-numerical-aperture (NA) lens, the system can distinguish between various killer crystalline defects and accurately localize them to the top surface, bottom surface, or within the substrate—all in a single scan. High-resolution defect imaging from up to six detection channels provides users with a clear view of defect morphology from all different possible aspects, enabling rapid, non-destructive inspection and binning without compromising throughput. 

When integrated with advanced defect analysis software, the system facilitates sub-defect mapping between pre-epitaxial and post-epitaxial stages, offering critical insights into defect propagation and interactions. This capability is essential for root-cause analysis, process optimization, and incoming substrate quality assurance. 

As the industry accelerates toward larger wafer sizes and more complex device architectures, the need for such an intelligent, high-throughput inspection solution is not just important—it is imperative. This technology represents a foundational step toward enabling scalable, reliable, and cost-effective manufacturing in the next generation of power semiconductor devices.