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A Review of Recent Technological Advancements in Corona Noncontact Metrology Tools, CnCV, for Industrial WBG Wafer Testing and Electrical Defect Related Yield Prediction

Mar 22 — Mar 24, 2026
China Semi Technology International Conference (CSTIC)
Shanghai, China

Abstract

In this review we discuss two recent CnCV metrology advancements, namely: 1. enhancement of throughput and 2. use of electrical defect mapping for yield prediction. Novel 10x faster measurements of critical WBG semiconductor electrical parameters are based on the discovery of a linear UV radiation induced electrical charge biasing.  Example results for an AlGaN/GaN HEMT structure illustrate wafer uniformity mapping reduced from hours to minutes and enabling the prediction of the useful wafer areaThe second development on SiC device yield was realized as a joint project with Nexperia and Fraunhofer IISB in Germany [2]. The project took advantage of the unique electrical defect mapping capability of the QUAD (Quality, Uniformity and Defect) technique in CnCV tools.  Macro and micro-scale QUAD mapping applied to a merged PiN Schottky (MPS) diode manufacturing process correlated QUAD bin map results with failed dies identifying the culprit epi-layer and process induced defects. This development paves a realistic path for meeting the demand for more advanced electrical defect detection and improving device yield prediction. 

Event Details

Event: SEMICON China
Date Mar 22 — Mar 24, 2026
Location Shanghai, China
Event China Semi Technology International Conference (CSTIC)
Presenters

Marshall Wilson