Jun 1 — Jul 4, 2021 Virtual

Advanced Outlier Die Control Technology in Fan-Out Panel Level Packaging Using Feedforward Lithography

John Chang

Presentation at 71st Electronic Components and Technology Conference
9:00am — 3:41am

5G, HPC, AI and IoT applications are current market drivers. These drive the demand for heterogeneous integration because they require high performance, integrated functionality and limited device size for next generation production. Fan-out panel level packaging is one of the technologies that has the potential to meet all of these packaging requirements. According to Yole’s analysis, the FOPLP market size will increase to $2.79 hundred million with 79% CAGR, showing that more people are adopting FOPLP.

Although FOPLP is one of the advanced packaging technologies that has potential to achieve the market drivers’ requirements, it also faces significant process challenges. One of the critical challenges is reconstituted die placement error that induces low yield. FOPLP requires KGD (known good die) transfer from the resource wafers to a panel carriage, these reconstituted dies suffered displacement errors from the nominal position because of pick and place error and the epoxy molding compound processes. In order to achieve acceptable yield and throughput, feedforward site by site exposure lithography was used to address these challenges in FOPLP, but a serious issue was observed with using feedforward site by site lithography: when one or above reconstituted dies’ displacement error was too huge, these dies affect the site correction accuracy and cause low overlay accuracy to the all dies in the site. To address this issue, advanced outlier control technology was utilized. This technology can precisely detect the outlier dies in the sites of a panel, and take customized actions to ensure the overlay accuracy based on various process requirement. 

In this paper, we demonstrated “outlier die control technology using feedforward lithography” on a 515mm x 510mm panel substrate. 400 simulation dies were built on this panel, and part of the dies were designed with a large displacement error, we ran this panel using feedforward lithography with outlier die control technology and showed how these two technologies integrated together and how this integration strategy worked for the FOPLP process. We also review and discuss the results for how this integration technology can maintain the yield and throughput under such challenging conditions.